.include "m8def.inc"			;загрузка предопределений для ATmega8
.list							;подключение генерации листинга

.cseg							;начало сегмента кода
.org 0x00						;начальное значение для адресации

								;========== Векторы прерываний =======
			  



								;== инициализация стека ===
init:
		  ldi   R16,low(RAMEND) ;скопируем в R16 младщий байт из константы RAMEND, которая определена в m8def.inc и хранит размер SRAM
          out   SPL,R16         ;скопируем значение из R16 в SPL
          ldi   R17,high(RAMEND);скопируем в R16 старший байт из константы RAMEND, которая определена в m8def.inc
          out   SPH,R17         ;скопируем значение из R17 в SPH

								;====== Инициализация портов ВВ
		  ldi R16, 0b00000001
		  out DDRB, R16

								 ; === Начало программы ===

main: 
		sbi PORTB, 0
		lpm
        lpm
		cbi PORTB, 0
		nop
		sbi PORTB, 0
		lpm
        lpm
		cbi PORTB, 0
		nop
		sbi PORTB, 0
		lpm
        lpm
		cbi PORTB, 0
		nop
		sbi PORTB, 0
		lpm
        lpm
		cbi PORTB, 0
		nop
		sbi PORTB, 0
		lpm
        lpm
		cbi PORTB, 0
		nop
		sbi PORTB, 0
		lpm
        lpm
		cbi PORTB, 0
		nop
		sbi PORTB, 0
		lpm
        lpm
		cbi PORTB, 0
		nop
		sbi PORTB, 0
		lpm
        lpm
		cbi PORTB, 0
		nop
		sbi PORTB, 0
		lpm
        lpm
		cbi PORTB, 0
		nop
		sbi PORTB, 0
		lpm
        lpm
		cbi PORTB, 0
		nop
		sbi PORTB, 0
		lpm
        lpm
		cbi PORTB, 0
		nop
		sbi PORTB, 0
		lpm
        lpm
		cbi PORTB, 0
		nop
		sbi PORTB, 0
		lpm
        lpm
		cbi PORTB, 0
		nop
		sbi PORTB, 0
		lpm
        lpm
		cbi PORTB, 0
		nop
		sbi PORTB, 0
		lpm
        lpm
		cbi PORTB, 0
		nop
		sbi PORTB, 0
		lpm
        lpm
		cbi PORTB, 0
		nop
		sbi PORTB, 0
		lpm
        lpm
		cbi PORTB, 0
		nop
		sbi PORTB, 0
		lpm
        lpm
		cbi PORTB, 0
		nop
		sbi PORTB, 0
		lpm
        lpm
		cbi PORTB, 0
		nop
		sbi PORTB, 0
		lpm
        lpm
		cbi PORTB, 0
		nop
		sbi PORTB, 0
		lpm
        lpm
		cbi PORTB, 0
		nop
		sbi PORTB, 0
		lpm
        lpm
		cbi PORTB, 0
		nop
		sbi PORTB, 0
		lpm
        lpm
		cbi PORTB, 0
		nop
		sbi PORTB, 0
		lpm
        lpm
		cbi PORTB, 0
		nop


		sbi PORTB, 0
		lpm
        lpm
		cbi PORTB, 0
		nop
		sbi PORTB, 0
		lpm
        lpm
		cbi PORTB, 0
		nop
		sbi PORTB, 0
		lpm
        lpm
		cbi PORTB, 0
		nop
		sbi PORTB, 0
		lpm
        lpm
		cbi PORTB, 0
		nop
		sbi PORTB, 0
		lpm
        lpm
		cbi PORTB, 0
		nop
		sbi PORTB, 0
		lpm
        lpm
		cbi PORTB, 0
		nop
		sbi PORTB, 0
		lpm
        lpm
		cbi PORTB, 0
		nop
		sbi PORTB, 0
		lpm
        lpm
		cbi PORTB, 0
		nop
		sbi PORTB, 0
		lpm
        lpm
		cbi PORTB, 0
		nop
		sbi PORTB, 0
		lpm
        lpm
		cbi PORTB, 0
		nop
		sbi PORTB, 0
		lpm
        lpm
		cbi PORTB, 0
		nop
		sbi PORTB, 0
		lpm
        lpm
		cbi PORTB, 0
		nop
		sbi PORTB, 0
		lpm
        lpm
		cbi PORTB, 0
		nop
		sbi PORTB, 0
		lpm
        lpm
		cbi PORTB, 0
		nop
		sbi PORTB, 0
		lpm
        lpm
		cbi PORTB, 0
		nop
		sbi PORTB, 0
		lpm
        lpm
		cbi PORTB, 0
		nop
		sbi PORTB, 0
		lpm
        lpm
		cbi PORTB, 0
		nop
		sbi PORTB, 0
		lpm
        lpm
		cbi PORTB, 0
		nop
		sbi PORTB, 0
		lpm
        lpm
		cbi PORTB, 0
		nop
		sbi PORTB, 0
		lpm
        lpm
		cbi PORTB, 0
		nop
		sbi PORTB, 0
		lpm
        lpm
		cbi PORTB, 0
		nop
		sbi PORTB, 0
		lpm
        lpm
		cbi PORTB, 0
		nop
		sbi PORTB, 0
		lpm
        lpm
		cbi PORTB, 0
		nop
		sbi PORTB, 0
		lpm
        lpm
		cbi PORTB, 0
		nop




			sbi PORTB, 0
			nop
			cbi PORTB, 0
			lpm
			lpm
			sbi PORTB, 0
			nop
			cbi PORTB, 0
			lpm
			lpm
			sbi PORTB, 0
			nop
			cbi PORTB, 0
			lpm
			lpm
			sbi PORTB, 0
			nop
			cbi PORTB, 0
			lpm
			lpm
			sbi PORTB, 0
			nop
			cbi PORTB, 0
			lpm
			lpm
			sbi PORTB, 0
			nop
			cbi PORTB, 0
			lpm
			lpm
			sbi PORTB, 0
			nop
			cbi PORTB, 0
			lpm
			lpm
			sbi PORTB, 0
			nop
			cbi PORTB, 0
			lpm
			lpm
			sbi PORTB, 0
			nop
			cbi PORTB, 0
			lpm
			lpm
			sbi PORTB, 0
			nop
			cbi PORTB, 0
			lpm
			lpm
			sbi PORTB, 0
			nop
			cbi PORTB, 0
			lpm
			lpm
			sbi PORTB, 0
			nop
			cbi PORTB, 0
			lpm
			lpm
			sbi PORTB, 0
			nop
			cbi PORTB, 0
			lpm
			lpm
			sbi PORTB, 0
			nop
			cbi PORTB, 0
			lpm
			lpm
			sbi PORTB, 0
			nop
			cbi PORTB, 0
			lpm
			lpm
			sbi PORTB, 0
			nop
			cbi PORTB, 0
			lpm
			lpm
		sbi PORTB, 0
		lpm
        lpm
		cbi PORTB, 0
		nop

		sbi PORTB, 0
		lpm
        lpm
		cbi PORTB, 0
		nop

		sbi PORTB, 0
		lpm
        lpm
		cbi PORTB, 0
		nop

		sbi PORTB, 0
		lpm
        lpm
		cbi PORTB, 0
		nop

		sbi PORTB, 0
		lpm
        lpm
		cbi PORTB, 0
		nop

		sbi PORTB, 0
		lpm
        lpm
		cbi PORTB, 0
		nop

		sbi PORTB, 0
		lpm
        lpm
		cbi PORTB, 0
		nop

		sbi PORTB, 0
		lpm
        lpm
		cbi PORTB, 0
		nop

		    ldi  r18, 133
L1:			dec  r18
			brne L1






		RJMP main